Interesting to see a nanotechnology-related application made the Federal Circuit decisions this week (In re Mouttet, 2011-1451, June 26, 2012). Unfortunately for the applicant, the Court affirmed the US PTO’s determination and found the claim(s) obvious, using standards for administrative review which respect the US PTO’s factual findings.
One reason applicant lost, per court analysis, is that he argued “teaching away,” but failed to support his points by failing to cite references that help his argument. Evidence and facts are key.
So in “digging to the bottom” on obviousness, do not be limited by the art set forth by the examiner. Within the practicalities of time and money: think more broadly; dig deeper. Control the references under review.
First, if facing an obviousness rejection, take the references the examiner cites and view them in a way that is fair and reasonable but in your favor. Then, find other references. It is not fair that, considering the vast sea of prior art, the examiner usually only selects references that “help” the examiner to establish prima facie obviousness. Push back on this unlevel playing field. Control to the extent you can selecting the prior art on the table upon which 103 will be resolved. Build your facts.
Of course, this applies both to USPTO work and also larger opinion and litigation contexts.
Each case has its own twists, but this is an important lesson for this nanotechnology case. Some of the claims are cited below in the published application:
Claim 1. A computing device comprising: at least one crossbar array including a first set of N conductive parallel wires (N.gtoreq.2) forming a set of columns and a second set of M conductive parallel wires (M.gtoreq.2) forming a set of rows, and formed so as to intersect the first set of conductive parallel wires, wherein intersections are formed between the first and second sets of wires forming M.times.N crosspoints wherein each of the crosspoints is programmable so as to be in a relatively high conductive state representative of a binary value 1 or a relatively low conductive state representative of a binary value 0; a programming unit configured to program the crosspoints to have one of the relatively high conductive state or the relatively low conductive state so that at least one column of the crossbar array stores a bit pattern representative of a programmed numerical value; an input unit configured to provide a bit pattern representative of an input numerical value to the columns of the crossbar array; and a post-processing unit configured to convert analog signals output from each of the rows of the crossbar array into digital output bit patterns and configured to combine the digital output bit patterns so as to form a resultant bit pattern representative of an output numerical value, wherein the output numerical value is mathematically dependent on both the programmed numerical value and the input numerical value.
Claim 3. The computing device of claim 2, wherein the resistance layer includes a conducting polymer or an organic semiconductor.
Claim 6. The computing device of claim 1, wherein the wires of the at least one crossbar array are formed from individual nanotubes or nanotube ribbons.