Eric Finnerty

Patent Law Clerk


Eric Finnerty is a patent law clerk with Foley & Lardner LLP and a member of the Electronics Practice. He has experience preparing and prosecuting domestic and international patent applications across a variety of technology areas, including data science and analytics, machine learning and artificial intelligence, computer networking, advertisements and marketing, wireless communications and autonomous vehicle communication systems. Eric is currently enrolled a Suffolk Law School.

Prior to joining Foley, Eric was a research assistant at the University of Massachusetts. During this time, he designed and implemented graph computing accelerators on field programmable gate arrays (FPGAs) and built an ultra-low power motion and activity tracker to detect motion disorder events in real time.


  • University of Massachusetts, (M.S.E., 2019)
  • University of Massachusetts, (B.S.E.., 2018)


  • Co-author, “Dr. BFS: Data Centric Breadth-First Search on FPGAs,” 2019 56th ACM/IEEE Design Automation Conference (August 22, 2019)
  • Co-author, “Software Hardware Co-Optimized BFS on FPGAs,” FPGA ’19: Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (February, 2019)


  • United States Patent and Trademark Office